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KickinWing
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PostPosted: Sat Nov 05, 2005 10:34 pm Reply with quoteBack to top

If I have a processor with a 512KB cache. How much RAM would that support? What formula is used to derive the figure, because I would like to know how much memory would be supported with 128KB, 256KB, 512KB, 1MB of cache memory on a CPU.

Thanks.
Anonymous101



Joined: 18 Oct 2004
Posts: 54
Location: Nottingham, England

PostPosted: Sat Nov 05, 2005 11:01 pm Reply with quoteBack to top

afaik, there's no connection between supported RAM and cache size. The RAM limit in each case is likey to be 4GB.
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KickinWing
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PostPosted: Sun Nov 06, 2005 1:16 am Reply with quoteBack to top

Perhaps I should have explained myself better.

I wasn't referring to the maximum addressable amount of memory. I have read somewhere that the CPU can only cache a certain amount of memory, usually lower than the maximum addressable size of RAM. if you put more RAM than what the CPU can cache, any reading from such memory out of that range will cause a cache miss, and because of such the CPU will have to wait cycles in order for the data to be transferred from slower RAM. In effect the computer will be slower with large amounts of RAM than with a smaller "cachable" size. And with the way windows is loaded into memory, from the top of ram downward, this really becomes an issue.
ryan no log
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PostPosted: Sun Nov 06, 2005 6:34 pm Reply with quoteBack to top

Quote:

I wasn't referring to the maximum addressable amount of memory. I have read somewhere that the CPU can only cache a certain amount of memory, usually lower than the maximum addressable size of RAM. if you put more RAM than what the CPU can cache, any reading from such memory out of that range will cause a cache miss


Anonymous101 gave the correct answer ASSUMING we're talking something newer than a PII. If you go back older systems required more tag memory to cache more ram, this is talking L2 external cache. The PII/PIII era though had some colusion in that the system board itself had limitations on cachable RAM, resulting in strange limits on cachable ram based on the chipset present.

Generally if the cache is ON CHIP/ ON DIE AKA in the cpu it will cache the addressable limit of standard RAM to 4gb in excess of 4gb in the secondary set of ram space up to 64gb such as on a PPro or newer server is uncached.

On older systems like a Pentium/k6-2 or lower the L1 cache has no limit but the L2 cache can only cache up to 64mb on a TX/VX chipset or up to 512mb on an HX, or up to 1024mb on a SiS 530/540. On the chipsets that exceed 64mb cachable area the cacheable size is determined by the amount of tag cache chips, generally
256kb of total cache will cache up to 128mb of ram (depends on the tag chips) 128kb goes up to about 64mb of ram, 64kb goes to about 16/32mb of ram.

Now this isn't to say that the amount of cache is unimportant. Currently systems have VERY LITTLE cache for the amount of memory installed but memory is also running much faster today. Generally the slower the memory is compared to the processor the more cache that should be present to make up for this. In reality for the amount of memory installed on modern systems we really should have about 16mb of L2 cache installed for optimal performance, this would be very expensive hence why you see PC manufacturers ignoring a very basic PC concept. Some servers still have 4mb or 8mb of cache L3 installed as really your 3ghz system could be easily outrun by a properly cached 1ghz system with a high bus speed. In the old days we thought a 3x multiplier was excessive and hurt performance, look at the multipliers today?

Thats why overall system performance really isn't growing by huge leaps and bounds compared to the increase in CPU speed. Memory and HD performance need to catch up. Todays HDs speed of about 150mb/sec (fake speed for the most part) is about the same as an 386 with a floppy drive as the main system drive in comparison to speed difference between the CPU bandwith vrs HD bandwidth.

Cheers
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PostPosted: Tue Nov 08, 2005 1:44 am Reply with quoteBack to top

ryan no log wrote:


Anonymous101 gave the correct answer ASSUMING we're talking something newer than a PII. If you go back older systems required more tag memory to cache more ram, this is talking L2 external cache. The PII/PIII era though had some colusion in that the system board itself had limitations on cachable RAM, resulting in strange limits on cachable ram based on the chipset present.

Generally if the cache is ON CHIP/ ON DIE AKA in the cpu it will cache the addressable limit of standard RAM to 4gb in excess of 4gb in the secondary set of ram space up to 64gb such as on a PPro or newer server is uncached.


This is good news.

Ryan wrote:

On older systems like a Pentium/k6-2 or lower the L1 cache has no limit but the L2 cache can only cache up to 64mb on a TX/VX chipset or up to 512mb on an HX, or up to 1024mb on a SiS 530/540. On the chipsets that exceed 64mb cachable area the cacheable size is determined by the amount of tag cache chips, generally
256kb of total cache will cache up to 128mb of ram (depends on the tag chips) 128kb goes up to about 64mb of ram, 64kb goes to about 16/32mb of ram.


I understand the need for caching in modern computers but why have multiple levels of it? whats wrong with just one large cache?

Now this isn't to say that the amount of cache is unimportant. Currently systems have VERY LITTLE cache for the amount of memory installed but memory is also running much faster today. Generally the slower the memory is compared to the processor the more cache that should be present to make up for this. In reality for the amount of memory installed on modern systems we really should have about 16mb of L2 cache installed for optimal performance, this would be very expensive hence why you see PC manufacturers ignoring a very basic PC concept. Some servers still have 4mb or 8mb of cache L3 installed as really your 3ghz system could be easily outrun by a properly cached 1ghz system with a high bus speed. In the old days we thought a 3x multiplier was excessive and hurt performance, look at the multipliers today?

Thats why overall system performance really isn't growing by huge leaps and bounds compared to the increase in CPU speed. Memory and HD performance need to catch up. Todays HDs speed of about 150mb/sec (fake speed for the most part) is about the same as an 386 with a floppy drive as the main system drive in comparison to speed difference between the CPU bandwith vrs HD bandwidth.

Cheers[/quote]

I suppose since computers are moving a way from the Intel FSB architecture in favor of the newer HyperTransport(tm) technology things should improve on the CPU speed front.

You say that 150mb/s is a fake speed, by that do you mean that the HDD doesn't take full advantage of the 150MB/s bandwidth maximum?
mf_2



Joined: 02 Oct 2004
Posts: 367
Location: Stuttgart, Germany

PostPosted: Tue Nov 08, 2005 6:40 pm Reply with quoteBack to top

Anonymous wrote:



I understand the need for caching in modern computers but why have multiple levels of it? whats wrong with just one large cache?



That's what I'm wondeirng and I have never really seen an answer to it. I only know that L1 is faster than L2, L2 is faster than L3 and L3 is faster than RAM. But I don't know why that is. I have a theory. While L1 cache was on the die since pentiums or 486s or something like that, you were able to add cache ( 256k or 512k ) via a module plugged in near the socket on some socket 7 boards for the early pentiums. myabe that's te reason. That module was slightly slower than the on-die cache since the distance to the processor itself was longer and maybe that's the reason for different cache levels. Thats just guessing on my part though...

Anonymous wrote:



You say that 150mb/s is a fake speed, by that do you mean that the HDD doesn't take full advantage of the 150MB/s bandwidth maximum?


It's like with LAN speed. In theory you should get somewhere around 12 megs a second off a 100mbit line, but in everyday use that doesn't really happen. There are just too many variables limitng the real transfer speed ( usage of the cpu, usage of the pci bus etc. ). Also keep in mind that with the pci bus, all pci cards have to share a bandwidth of 133mbyte/s.
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ryan no log
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PostPosted: Tue Nov 08, 2005 11:45 pm Reply with quoteBack to top

Modern cpus have full processor speed L1 with NO bandwidth limit. The L1 is addressable without an extra address cycle and is addressable by different sectors of the cpus processing unit similtaneously meaning it is more than 64bit wide.

L2 has a specific bus width limit aka 32/64bits and although its on die and runs at full cpu speed requires the processor to run an address cycle to get data out thus L1 is still almost double the speed on small sets of code compared to l2. CPUS can only dirrectly address small amounts of memory without an address cycle hence why L1 is usually limited in size, make it much larger and you need a LOT more logic around it which may slow its speed down.

L2 cache currently is built into the cpu which severly limits its size due to the immense cost of adding more to the die.

L3 comes into play because it is the only cache that can be added in large amounts off die. A modern system should have lots of L3 due to the extreme bus lag in modern machines but sadly no one wants to add another $75-$150 to the cost of the motherboard to double RAM performance

Cache s
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PostPosted: Thu Nov 10, 2005 4:52 pm Reply with quoteBack to top

http://en.wikipedia.org/wiki/Data_cache
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